Among all electronic devices existed in the present, there are many electronic working components assembled therein, such as micro processors, semiconductor chips or light emitting diodes (LEDs), etc., to execute preset assignments. In the practice, it is usually necessary to print a printed circuit on a substrate board, and deposit the electronic components on the printed circuit, so as to manufacture a printed circuit board.
Meanwhile, when the electronic components execute the preset assignments, it is unavoidable to release heat energy. In the most conditions, if heat energy could not be dissipated out of the PCB, it not only influences the normal operations of the electronic components, but also makes the PCB be damaged. Therefore, among many designs of the substrate boards, the efficiency of heat dissipating is usually taken into consideration.
Furthermore, when forming the printed circuits, especially for the integrated type of printed circuits, it is usually necessary to consider electrical isolation conditions between the printed circuits and the electronic components. Under the consideration of safety, the electrical isolation conditions usually need to meet a principle of preventing the printed circuits and the electronic components from being damaged under a breaking voltage.
Under the above background, a printed circuit board with high efficiency of heat conduction has been disclosed in a patent published in Taiwan with the publication number of 200626031 (the '031 patent). Thus, the detail description of a representative prior art with reference to the '031 patent is disclosed as follows.
Please refer to FIG. 1, which illustrates a structure of a printed circuit board in accordance with the prior art with reference to the '031 patent. As shown in FIG. 1, a printed circuit board 1 comprises a substrate board 11, a printed circuit 12, a protection layer 13, a solder 14 and a semiconductor chip 15. The substrate board 11 is composed of a substrate layer 111, an electrical isolation layer 112 and a heat conduction and electrical isolation layer 113. The electrical isolation layer 112 covers one surface of the substrate layer 111, the heat conduction and electrical isolation layer 113 further covers the electrical isolation layer 112. In the 031' patent, it is clearly mentioned that the isolation layer 112 is composed of a high polymer material, such as Epoxy.
The printed circuit 12 is printed on the heat conduction and electrical isolation layer 113, the protection layer 13 covers the isolation layer 112, and the semiconductor chip 15 is electrically connected to the printed circuit 12 via the solder 14. In practice, the protection layer 13 can be etched to form an opening for soldering, or the solder 14 can melt the protection layer 13 to form the opening when it is provided in a high temperature, so that the semiconductor can be electrically connected to the printed circuit 12 via the solder 14.
People skilled in ordinary arts can easily realize that, in the technology as mentioned above, although that the electrical isolation layer 112 composed of the high polymer material can provide good performance of electrical isolation; however, heat energy release from the semiconductor chip just can be slowly transferred to the substrate layer 111 via electrical isolation layer 112 due to that the heat conduction performance of the electrical isolation layer 112, composed of high polymer material, is very poor.
For Example, when the substrate layer 111 is an aluminum substrate board, the electrical layer 112 is made of Epoxy, and the heat conduction and electrical isolation layer 113 is made of a diamond like carbon (DLC) material, the heat conduction coefficients of all members are listed as follows: the heat conduction coefficient of the substrate layer 111 is approximate to 239 W/m·K (Watt, per meter, per temperature degree in Kelvin); the heat conduction coefficient of the electrical isolation layer 112 is approximate to 0.2˜4.0 W/m·K; and the heat conduction coefficient of the heat conduction and electrical isolation layer 113 is approximate to 2000 W/m·K. Therefore, heat energy released from the semiconductor chip 15 can be quickly transferred from the substrate layer 111 to the electrical isolation layer 112, but it transfers to the heat conduction and electrical isolation layer 113 very slowly due to that the heat conduction of the electrical isolation layer 112 is much less than that of other members. Thus, the electrical isolation will become another new relative heat source.
Following above description, when the substrate layer 111 is an aluminum substrate board, the electrical layer 112 is made of Epoxy, and the heat conduction and electrical isolation layer 113 is made of a diamond like carbon (DLC) material, the heat expansion coefficients of all members are listed as follows: the heat expansion coefficient of the substrate layer 111 is approximate to 23.8×10−6/° C.; the heat expansion coefficient of the electrical isolation layer 112 is approximate to 50˜60×10−6/° C.; and the heat expansion coefficient of the heat conduction and electrical isolation layer 113 is approximate to 1.5×10−6/° C.
From above data, we can clearly know that the heat expansion coefficient of the substrate layer 111 is only 40%˜48% of that of the electrical isolation layer 112, but the heat expansion coefficient of the electrical isolation layer 112 is 33˜40 times of that of the heat conduction and electrical isolation layer 113. Viewing from all processes of manufacturing the substrate board 11, it is obvious that a great residual thermal stress will be generated between the electrical isolation layer 112 and the heat conduction and electrical isolation layer 113 after the substrate board 11 cooling down. Therefore, a phenomenon of peeling will be generated between the heat conduction and electrical isolation layer 113 and the electrical isolation layer 112.
Nevertheless, following above description, due to that the isolation layer 112 becomes another new relative heat source neighbor to the semiconductor chip 15, the overall heat conduction performance of the substrate board 11, that can dissipate heat energy released from the semiconductor ship 15, will become poorer and poorer.